| PART |
Description |
Maker |
| XPGA LFX1200B-03F900C LFX200B-3F900C LFX500B-3F900 |
Circular Connector; MIL SPEC:MIL-C-26482, Series I; Body Material:Aluminum Alloy; Series:MS3112; No. of Contacts:19; Connector Shell Size:14; Connecting Termination:Solder; Circular Shell Style:Box Mount Receptacle RoHS Compliant: No
Circular Connector; No. of Contacts:26; Series:; Body Material:Aluminum; Connecting Termination:Solder; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:16-26 RoHS Compliant: No
PT 8C 8#16 SKT RECP
Circular Connector; Body Material:Aluminum Alloy; Series:MS3112; No. of Contacts:8; Connector Shell Size:16; Connecting Termination:Solder; Circular Shell Style:Box Mount Receptacle; Circular Contact Gender:Pin RoHS Compliant: No
The ispXPGA architecture ispXPGA架构
The ispXPGA architecture 在ispXPGA架构
|
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
|
| M5LV-512/256-10SAI M5LV-512/256-12SAC M5LV-256/160 |
EE PLD, 10 ns, PBGA352 BGA-352
EE PLD, 12 ns, PBGA352 BGA-352
Fifth Generation MACH Architecture EE PLD, 10 ns, PQFP208
Fifth Generation MACH Architecture EE PLD, 12 ns, PQFP208
Fifth Generation MACH Architecture EE PLD, 20 ns, PQFP160
Fifth Generation MACH Architecture EE PLD, 5.5 ns, PQFP100
Fifth Generation MACH Architecture EE PLD, 15 ns, PQFP160
Fifth Generation MACH Architecture EE PLD, 10 ns, PQFP160
EE PLD, 15 ns, PBGA352 BGA-352
Fifth Generation MACH Architecture EE PLD, 5.5 ns, PQFP144
EE PLD, 15 ns, PQFP160 PLASTIC, QFP-160
CONNECTOR ACCESSORY EE PLD, 5.5 ns, PQFP100
Fifth Generation MACH Architecture EE PLD, 15 ns, PQFP208
Fifth Generation MACH Architecture EE PLD, 7.5 ns, PQFP208
Fifth Generation MACH Architecture EE PLD, 10 ns, PQFP100
EE PLD, 15 ns, PQFP100 TQFP-100
Fifth Generation MACH Architecture EE PLD, 20 ns, PQFP208
EE PLD, 12 ns, PQFP100 TQFP-100
EE PLD, 12 ns, PBGA256 BGA-256
|
Lattice Semiconductor, Corp.
LATTICE SEMICONDUCTOR CORP
|
| CAT64LC10ZJ CAT64LC10ZP CAT64LC10J-TE7 CAT64LC10J- |
18-Mbit QDR™-II SRAM 4-Word Burst Architecture
18-Mbit DDR-II SRAM 2-Word Burst Architecture
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
4-Mbit (256K x 18) Flow-Through Sync SRAM SPI串行EEPROM
SPI Serial EEPROM SPI串行EEPROM
|
Analog Devices, Inc.
|
| CY7C1515KV18-250BZXI CY7C1515KV18-300BZC CY7C1515K |
72-Mbit QDR II SRAM 4-Word Burst Architecture
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 QDR SRAM, 0.45 ns, PBGA165
|
http://
Cypress Semiconductor, Corp.
|
| CY7C1371D-100AXI CY7C1371D-100BGI CY7C1373D-100BZI |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 8.5 ns, PQFP100
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 18兆位（为512k × 36/1M × 18）流体系结构，通过与NoBLTM的SRAM
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 8.5 ns, PBGA165
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 6.5 ns, PBGA119
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 512K X 36 ZBT SRAM, 8.5 ns, PBGA165
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 6.5 ns, PQFP100
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 6.5 ns, PBGA165
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 512K X 36 ZBT SRAM, 8.5 ns, PBGA119
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| CY7C1315CV18-200BZC CY7C1315CV18-250BZC |
18-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V 512K X 36 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1513JV18-250BZXC |
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1355B-117BGI CY7C1355B-117BZC CY7C1355B-117BGC |
9-Mb (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture 9 - MB的（256 × 36/512K × 18）流体系结构，通过与总线延迟静态存储器
9-Mb (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture 256K X 36 ZBT SRAM, 7.5 ns, PBGA165
9-Mb (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture 256K X 36 ZBT SRAM, 6.5 ns, PBGA165
9-Mb (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture 256K X 36 ZBT SRAM, 7 ns, PQFP100
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| CY7C1307AV18-167BZC CY7C1307AV18 CY7C1307AV18-100B |
18-Mb Burst of 4 Pipelined SRAM with QDR垄芒 Architecture
18-Mb Burst of 4 Pipelined SRAM with QDR Architecture
|
Cypress Semiconductor
|
| CY7C1423JV18-250BZXC |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture; Architecture: DDR-II SIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 2M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1354CV25-225AXI CY7C1354CV25-167AXI CY7C1356CV |
9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL™ Architecture
9-Mbit ( 256K x 36/512K x 18 ) Pipelined SRAM with NoBL-TM Architecture 9兆位56 × 36/512K × 18）流水线的SRAM的总线延迟TM架构
9-Mbit ( 256K x 36/512K x 18 ) Pipelined SRAM with NoBL-TM Architecture 9兆位56 × 36/512K × 18）流水线的SRAM的总线延迟，TM架构
|
Cypress Semiconductor Corp.
|
